The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Dec. 28, 2012
Applicants:

Yasuhiro Nojiri, Yokohama, JP;

Hiroyuki Fukumizu, Yokohama, JP;

Shigeki Kobayashi, Kuwana, JP;

Masaki Yamato, Yokkaichi, JP;

Inventors:

Yasuhiro Nojiri, Yokohama, JP;

Hiroyuki Fukumizu, Yokohama, JP;

Shigeki Kobayashi, Kuwana, JP;

Masaki Yamato, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/02 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/146 (2013.01); H01L 45/16 (2013.01); H01L 45/04 (2013.01); H01L 45/12 (2013.01); H01L 45/1226 (2013.01); H01L 45/1616 (2013.01); H01L 27/2454 (2013.01); H01L 27/249 (2013.01);
Abstract

A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; and a memory cell block formed on the semiconductor substrate and configured having a plurality of memory cell arrays, each of the memory cell arrays including a plurality of column lines, a plurality of row lines, and a plurality of memory cells disposed at each of intersections of the plurality of column lines and the plurality of row lines, each of the memory cells including a variable resistance element having a transition metal oxide as a material, at least one of the plurality of column lines and the plurality of row lines being a polysilicon wiring line having polysilicon as a material, and the memory cell block including a block film between the variable resistance element of the memory cell and the polysilicon wiring line.


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