The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2015
Filed:
Sep. 22, 2011
Eun-sik Kim, Asan-si, KR;
Kil-yeon Kim, Seongnam-si, KR;
Yun-bo Yang, Asan-si, KR;
Kui-hyun RO, Asan-si, KR;
Heon-gwon Lee, Suwon-si, KR;
Young-jae Jung, Asan-si, KR;
Eun-sik Kim, Asan-si, KR;
Kil-yeon Kim, Seongnam-si, KR;
Yun-bo Yang, Asan-si, KR;
Kui-hyun Ro, Asan-si, KR;
Heon-gwon Lee, Suwon-si, KR;
Young-jae Jung, Asan-si, KR;
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;
Abstract
A method for testing a plurality of semiconductor apparatuses, the method including mounting a plurality of semiconductor apparatuses on a first test board, wherein the plurality of semiconductor apparatuses include test circuits, loading test software into the test circuits, performing, by using the test circuits, self-tests on the plurality of semiconductor apparatuses based on the test software, and removing the plurality of semiconductor apparatuses, which have completed the self-tests, from the first test board. Upon completion of the loading of the test software, the test software is loaded into test circuits of a plurality of semiconductor apparatuses on a second test board, while the self-tests are performed on the plurality of semiconductor apparatuses on the first test board.