The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2015
Filed:
Aug. 07, 2014
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Yong-Soo Joung, Gyeonggi-do, KR;
Hyung-Kyun Kim, Gyeonggi-do, KR;
Jae-Soo Kim, Gyeonggi-do, KR;
Dong-Gun Hwang, Gyeonggi-do, KR;
Kyoung Yoo, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/768 (2006.01); H01L 27/108 (2006.01); H01L 21/764 (2006.01); H01L 23/532 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76879 (2013.01); H01L 21/7682 (2013.01); H01L 23/53295 (2013.01); H01L 27/10855 (2013.01); H01L 21/76897 (2013.01); H01L 21/76834 (2013.01); H01L 27/10885 (2013.01); H01L 23/5222 (2013.01); H01L 21/764 (2013.01); H01L 21/7685 (2013.01);
Abstract
A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial spacers, forming conductive capping layers capping the first plugs and the air gaps, and forming second plugs over the conductive capping layers.