The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2015

Filed:

Dec. 19, 2012
Applicant:

Shinko Electric Industries Co., Ltd., Nagano-shi, Nagano, JP;

Inventor:

Hajime Iizuka, Nagano, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/0203 (2014.01); H01L 31/18 (2006.01); H01L 25/16 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 27/146 (2006.01); H01L 23/00 (2006.01); H01L 23/13 (2006.01);
U.S. Cl.
CPC ...
H01L 31/0203 (2013.01); H01L 31/18 (2013.01); H01L 25/16 (2013.01); H01L 23/49822 (2013.01); H01L 23/49833 (2013.01); H01L 21/563 (2013.01); H01L 27/14618 (2013.01); H01L 2224/73204 (2013.01); H01L 23/49811 (2013.01); H01L 24/16 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/16227 (2013.01); H01L 23/13 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/16225 (2013.01);
Abstract

An electronic device includes a first wiring substrate including a component mounting area, a second wiring substrate stacked on the first wiring substrate, in which an opening portion is provided in a part corresponding to the component mounting area, and connected to the first wiring substrate via solder bumps which are arranged on a periphery of the component mounting area, a frame-like resin dam layer formed between the solder bumps on the periphery of the component mounting area, and surrounding the component mounting area, and an electronic component mounted on the component mounting area of the first wiring substrate, wherein a sealing resin is filled between the first wiring substrate and the second wiring substrate such that the component mounting area is formed as a resin non-forming area by the resin dam layer.


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