The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2015

Filed:

Mar. 15, 2010
Applicants:

Peng Zou, Portland, OR (US);

Joseph T. Dibene, Ii, Olympia, WA (US);

Fernardi Thenus, Portland, OR (US);

Inventors:

Peng Zou, Portland, OR (US);

Joseph T. Dibene, II, Olympia, WA (US);

Fernardi Thenus, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 1/3287 (2013.01); Y02B 60/1278 (2013.01); Y02B 60/1282 (2013.01);
Abstract

In some embodiments, the invention provides a higher efficiency, real-time platform power management architecture for computing platforms. A more direct power management architecture may be provided using integrated voltage regulators and in some embodiments, a direct power management interface (DPMI) as well. Integrated voltage regulators, such as in-silicon voltage regulators (ISVR) can be used to implement quicker, more highly responsive power state transitions.


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