The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2015
Filed:
Jul. 24, 2013
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Derek C. Tao, Fremont, CA (US);
Bing Wang, Palo Alto, CA (US);
Allen Fan, Los Altos, CA (US);
Yukit Tang, San Jose, CA (US);
Annie-Li-Keow Lum, San Jose, CA (US);
Kuoyuan Hsu, San Jose, CA (US);
Assignee:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 8/00 (2013.01);
Abstract
A memory macro comprises a data line, a first interface circuit comprising a first node coupled to the data line, and a voltage keeper configured to control a voltage level at the first node, and a second interface circuit comprising a second node coupled with the data line, wherein the voltage keeper is configured to control a voltage level at the second node via the data line.