The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

Dec. 29, 2011
Applicants:

Jeff Forristal, Hillsboro, OR (US);

Faraz Siddiqi, Portland, OR (US);

Lukasz Mielicki, Gdansk, PL;

Hao-chi Wong, San Carlos, CA (US);

Inventors:

Jeff Forristal, Hillsboro, OR (US);

Faraz Siddiqi, Portland, OR (US);

Lukasz Mielicki, Gdansk, PL;

Hao-Chi Wong, San Carlos, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 1/32 (2013.01);
Abstract

Secure fast platform hibernation and resumption for computing systems. An embodiment of an apparatus includes a processor to operate according to an operating system, the processor to transition the apparatus to a first reduced power state in response to a request, the transition to the first reduced power state including the processor to store context data for the apparatus in a volatile system memory, and logic to transition the apparatus to a second reduced power state, the logic to write the context data from the volatile system memory to a nonvolatile memory for the transition to the second reduced power state, wherein the logic is to implement one or more security measures for the writing of the context data into the nonvolatile memory.


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