The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

May. 09, 2014
Applicant:

Microsemi Soc Corporation, San Jose, CA (US);

Inventors:

Jonathan Greene, Palo Alto, CA (US);

Frank Hawley, Campbell, CA (US);

John McCollum, San Jose, CA (US);

Assignee:

Microsemi SoC Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/02 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1253 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/085 (2013.01); H01L 45/1266 (2013.01); H01L 45/141 (2013.01); H01L 45/142 (2013.01); H01L 45/149 (2013.01); H01L 45/1616 (2013.01); H01L 45/1625 (2013.01); H01L 45/1675 (2013.01); H01L 45/122 (2013.01); H01L 45/1233 (2013.01); Y10S 438/90 (2013.01);
Abstract

A resistive random access memory cell formed in an integrated circuit includes first and second resistive random access memory devices, each including an anode and a cathode. The anode of the second resistive random access memory device is connected to the anode of the first resistive random access memory device. A programming transistor has a first source/drain terminal connected to a programming potential node, a second source/drain terminal connected to the anodes of the first and second resistive random access memory devices, and a gate connected to a program-enable node.


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