The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2015
Filed:
May. 13, 2011
Di Tang, Shanghai, CN;
Vincent Zimmer, Federal Way, WA (US);
James Edwards, Portland, OR (US);
Rahul Khanna, Portland, OR (US);
Yufu LI, Shanghai, CN;
Abdul Bailey, Tigard, OR (US);
Di Tang, Shanghai, CN;
Vincent Zimmer, Federal Way, WA (US);
James Edwards, Portland, OR (US);
Rahul Khanna, Portland, OR (US);
Yufu Li, Shanghai, CN;
Abdul Bailey, Tigard, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.