The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2015
Filed:
May. 26, 2006
Applicants:
Shamanna M Datta, Hillsboro, OR (US);
Mohan J Kumar, Aloha, OR (US);
Inventors:
Shamanna M Datta, Hillsboro, OR (US);
Mohan J Kumar, Aloha, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 9/32 (2006.01); G06F 21/00 (2013.01); G06F 21/53 (2013.01); G06F 21/74 (2013.01);
U.S. Cl.
CPC ...
G06F 21/00 (2013.01); G06F 21/53 (2013.01); G06F 21/74 (2013.01);
Abstract
Methods and apparatus for initiating secure operations in a microprocessor system are described. In one embodiment, a system includes a processor to execute a secured enter instruction, and a chipset to cause the system to enter a quiescent state during execution of the secured enter instruction.
Datta, Shamanna. (2015). Execution of a secured environment initialization instruction on a point-to-point interconnect system (U.S. Patent No. 8973094). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8973094
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile