The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2015
Filed:
Sep. 14, 2012
Yi-chen Chung, Hsin-Chu, TW;
Chia-yu Chen, Hsin-Chu, TW;
Hui-ling Ku, Hsin-Chu, TW;
Yu-hung Chen, Hsin-Chu, TW;
Chi-wei Chou, Hsin-Chu, TW;
Fan-wei Chang, Hsin-Chu, TW;
Hsueh-hsing LU, Hsin-Chu, TW;
Hung-che Ting, Hsin-Chu, TW;
Yi-Chen Chung, Hsin-Chu, TW;
Chia-Yu Chen, Hsin-Chu, TW;
Hui-Ling Ku, Hsin-Chu, TW;
Yu-Hung Chen, Hsin-Chu, TW;
Chi-Wei Chou, Hsin-Chu, TW;
Fan-Wei Chang, Hsin-Chu, TW;
Hsueh-Hsing Lu, Hsin-Chu, TW;
Hung-Che Ting, Hsin-Chu, TW;
AU Optronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A manufacturing method of an array substrate includes the following steps. A gate electrode and a gate insulator layer are successively formed on a substrate. A semiconductor layer, an etching stop layer, a hard mask layer, and a second patterned photoresist are successively formed on the gate insulator layer. The second patterned photoresist is employed for performing an over etching process to the hard mask layer to form a patterned hard mask layer. The second patterned photoresist is employed for performing a first etching process to the etching stop layer. The second patterned photoresist is then employed for performing a second etching process to the semiconductor layer to form a patterned semiconductor layer. The etching stop layer uncovered by the patterned hard mask layer is then removed for forming a patterned etching stop layer.