The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2015

Filed:

Oct. 25, 2013
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Kenneth S. McElvain, Los Altos, CA (US);

Benoit Lemonnier, Palo Alto, CA (US);

William Halpin, San Jose, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/505 (2013.01); G06F 17/5072 (2013.01);
Abstract

The present invention discloses methods and apparatuses to design an integrated circuit. According to one aspect, a method of designing an integrated circuit comprises determining a state of a design of the integrated circuit at a high level design representation of the integrated circuit, wherein the state of the design of the integrated circuit comprises a netlist with at least one of timing data, resource information, placement information, routing information, and power data. The method further comprises determining a first transform for the state, changing the state of the design at the high level design representation of the integrated circuit using the first transform, and determining a second transform based on the changed state.


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