The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2015

Filed:

Jun. 10, 2013
Applicant:

Peter D. Vogt, Boulder, CO (US);

Inventor:

Peter D. Vogt, Boulder, CO (US);

Assignee:

Intel Corporation, Santa Clara, unknown;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
G11C 5/066 (2013.01);
Abstract

Apparatus and methods of increasing the data rate and bandwidth of system memory including stacked memory device dice. The system memory includes a memory device having a plurality of memory device dice in a stacked configuration, a memory controller coupled to the stacked memory device dice, and a partitioned data bus. The memory device dice each include one, two, or more groups of memory banks. By configuring each memory device die to deliver all of its bandwidth over a different single partition of the data channel, the system memory can achieve an increased data rate and bandwidth without significantly increasing costs over typical system memory configurations that include stacked memory device dice.


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