Semiconductor device with strain technique

Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a fin structure disposed over the substrate in the gate region. The fin structure includes a first semiconductor material layer as a lower portion of the fin structure, a semiconductor oxide layer as a middle portion of the fin structure and a second semiconductor material layer as an upper portion of the fin structure. The semiconductor device also includes a dielectric feature disposed between two adjacent fin structures over the substrate. A top surface of the dielectric feature located, in a horizontal level, higher than the semiconductor oxide layer with a distance d. The semiconductor device also includes a high-k (HK)/metal gate (MG) stack disposed in the gate region, including wrapping over a portion of the fin structure.