The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2015
Filed:
Feb. 04, 2013
Applicant:
Power Integrations, Inc., San Jose, CA (US);
Inventors:
Assignee:
Power Integrations, Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 27/06 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 27/0605 (2013.01); H01L 29/402 (2013.01); H01L 29/41725 (2013.01); H01L 29/7787 (2013.01); H01L 27/0617 (2013.01); H01L 29/2003 (2013.01); H01L 29/41758 (2013.01); H01L 29/42316 (2013.01); H01L 29/4236 (2013.01); H03K 2017/6875 (2013.01);
Abstract
A circuit includes input drain, source and gate nodes. The circuit also includes a group III nitride enhancement-mode HFET having a source, drain and gate and a voltage shifter having a first terminal connected to the gate of the enhancement mode HFET at a common junction. The circuit also includes a load resistive element connected to the common junction. The drain of the enhancement-mode HFET serves as the input drain node, the source of the enhancement-mode HFET serves as the input source node and a second terminal of the voltage shifter serves as the input gate node.