The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2015
Filed:
Jun. 12, 2012
Beom-yong Kim, Gyeonggi-do, KR;
Kee-jeung Lee, Gyeonggi-do, KR;
Yun-hyuck Ji, Gyeonggi-do, KR;
Seung-mi Lee, Gyeonggi-do, KR;
Jae-hyoung Koo, Gyeonggi-do, KR;
Kwan-woo DO, Gyeonggi-do, KR;
Kyung-woong Park, Gyeonggi-do, KR;
Ji-hoon Ahn, Gyeonggi-do, KR;
Woo-young Park, Gyeonggi-do, KR;
Beom-Yong Kim, Gyeonggi-do, KR;
Kee-Jeung Lee, Gyeonggi-do, KR;
Yun-Hyuck Ji, Gyeonggi-do, KR;
Seung-Mi Lee, Gyeonggi-do, KR;
Jae-Hyoung Koo, Gyeonggi-do, KR;
Kwan-Woo Do, Gyeonggi-do, KR;
Kyung-Woong Park, Gyeonggi-do, KR;
Ji-Hoon Ahn, Gyeonggi-do, KR;
Woo-Young Park, Gyeonggi-do, KR;
SK Hynix Inc., Gyeonggi-do, KR;
Abstract
A method for fabricating a capacitor includes: forming a first silicon layer over a semiconductor substrate, where the first silicon layer is doped with a dopant; forming an undoped second silicon layer over the first silicon layer; forming an opening by etching the second silicon layer and the first silicon layer; forming a storage node in the opening; and removing the first silicon layer and the second silicon layer.