The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2015
Filed:
Dec. 30, 2011
Paul A. Nyhus, Portland, OR (US);
Shem O. Ogadhoh, Beaverton, OR (US);
Swaminathan Sivakumar, Beaverton, OR (US);
Seongtae Jeong, Portland, OR (US);
Paul A. Nyhus, Portland, OR (US);
Shem O. Ogadhoh, Beaverton, OR (US);
Swaminathan Sivakumar, Beaverton, OR (US);
Seongtae Jeong, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques are provided for determining how thick or how deep to make the phased regions of a lithography mask. One example embodiment provides a method that includes: providing a first mask layout design including a first test set, and providing a second mask layout design including a second test set, wherein the second test set is larger than the first test set; simulating critical dimensions through focus of structures of interest in the first test set for a range of phase depths/thicknesses, and selecting an initial preferred mask phase depth/thickness based on results of the simulating; and generating a fast thick-mask model (FTM) at the initial preferred phase depth/thickness, and correcting the second test set of the second mask layout design using the FTM, thereby providing an optimized mask layout design. A mask having the optimized mask layout design may be implemented to give the optimum patterning.