The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2015
Filed:
Jan. 14, 2014
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Ming Cai, Hopewell Junction, NY (US);
Dechao Guo, Fishkill, NY (US);
Liyang Song, Wappingers Falls, NY (US);
Chun-Chen Yeh, Clifton Park, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/84 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/165 (2006.01); H01L 21/762 (2006.01); H01L 29/786 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7846 (2013.01); H01L 21/845 (2013.01); H01L 29/7848 (2013.01); H01L 29/66575 (2013.01); H01L 29/66636 (2013.01); H01L 29/66651 (2013.01); H01L 29/1054 (2013.01); H01L 29/165 (2013.01); H01L 21/76224 (2013.01); H01L 29/78684 (2013.01); H01L 29/785 (2013.01); H01L 21/823412 (2013.01); H01L 21/823418 (2013.01); H01L 21/823481 (2013.01);
Abstract
A method for fabricating a transistor with uniaxial stress channels includes depositing an insulating layer onto a substrate, defining bars within the insulating layer, recessing a channel into the substrate, growing a first semiconducting material in the channel, defining a gate stack over the bars and semiconducting material, defining source and drain recesses and embedding a second semiconducting material into the source and drain recesses.