The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2015
Filed:
Aug. 27, 2008
Applicants:
Masahiko Higashi, Aizuwakamatsu, JP;
Hiroyuki Nansei, Aizuwakamatsu, JP;
Inventors:
Masahiko Higashi, Aizuwakamatsu, JP;
Hiroyuki Nansei, Aizuwakamatsu, JP;
Assignee:
Spansion LLC, Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 27/105 (2006.01); H01L 21/265 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 27/105 (2013.01); H01L 21/26586 (2013.01); H01L 27/11568 (2013.01); H01L 27/11534 (2013.01);
Abstract
A semiconductor memory device employs a SONOS type memory architecture and includes a bit line diffusion layer in a shallow trench groove in which a conductive film is buried. This makes it possible to decrease the resistivity of the bit line diffusion layer without enlarging the area on the main surface of the semiconductor substrate, and to fabricate the semiconductor memory device having stable electric characteristics without enlarging the cell area. The bit line is formed by implanting ions into the sidewall of SiN.