The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2015

Filed:

Jun. 07, 2013
Applicant:

Wintek Corporation, Taichung, TW;

Inventors:

Hieng-Hsiung Huang, Hsinchu, TW;

Wen-Chun Wang, Taichung, TW;

Heng-Yi Chang, Taipei, TW;

Chin-Chang Liu, Taichung, TW;

Assignee:

Wintek Corporation, Tanzi Dist., Taichung, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/786 (2006.01); C23C 14/02 (2006.01); C23C 14/18 (2006.01); C23C 16/02 (2006.01); C23C 16/24 (2006.01); C30B 29/06 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78672 (2013.01); C23C 14/024 (2013.01); C23C 14/025 (2013.01); C23C 14/185 (2013.01); C23C 16/0209 (2013.01); C23C 16/0272 (2013.01); C23C 16/0281 (2013.01); C23C 16/24 (2013.01); C30B 29/06 (2013.01); H01L 21/02422 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 21/0262 (2013.01); H01L 21/02658 (2013.01); H01L 29/66757 (2013.01); H01L 29/78675 (2013.01); H01L 29/66765 (2013.01); H01L 29/78678 (2013.01); C03C 2218/152 (2013.01); C03C 2218/153 (2013.01); C03C 2218/154 (2013.01);
Abstract

A method of forming a thin film poly silicon layer includes following steps. Firstly, a substrate is provided. A heating treatment is then performed. A thin film poly silicon layer is then directly formed on a first surface of the substrate by a silicon thin film deposition process. A method of forming a thin film transistor includes following steps. Firstly, a substrate is provided. A heating treatment is then performed. A thin film poly silicon layer is then directly formed on a first surface of the substrate by a silicon thin film deposition process. A first patterning process is performed on the thin film poly silicon layer to form a semiconductor pattern. Subsequently, a gate insulation layer, a gate electrode, a source electrode and a drain electrode are formed.


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