The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2015
Filed:
Dec. 17, 2013
Applicant:
Cadence Design Systems, Inc., San Jose, CA (US);
Inventors:
Amit Sharma, Noida, IN;
Amit Aggarwal, Ghaziabad, IN;
Manu Chopra, New Delhi, IN;
Abhishek Raheja, Noida, IN;
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5009 (2013.01); G06F 17/504 (2013.01);
Abstract
The present disclosure relates to a computer-implemented method for electronic design verification. The method may include providing, using a processor, a low-power electronic design and determining if a power domain associated with the low-power electronic design is active. The method may further include identifying, at a register transfer level (RTL) at least one X value associated with an active power domain wherein identifying occurs during a simulation.