The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2015

Filed:

Feb. 28, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventor:

William K. Henson, Beacon, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 27/092 (2006.01); H01L 21/311 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/823807 (2013.01); H01L 21/823864 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01);
Abstract

A method is provided that includes forming a high-k dielectric etch stop layer over at least a first conductivity type semiconductor device on a first portion of a substrate and at least a second conductivity type semiconductor device on a second portion of the semiconductor device. A first stress-inducing layer is deposited over the first conductivity type semiconductor device and the second conductivity type semiconductor device. The portion of the first stress-inducing layer that is formed over the second conductivity type semiconductor device is then removed with an etch that is selective to the high-k dielectric etch stop layer to provide an exposed surface of second portion of the substrates that includes at least the second conductivity type semiconductor device. A second stress-inducing layer is then formed over the second conductivity type semiconductor device.


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