The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2015

Filed:

Nov. 05, 2013
Applicant:

Intermolecular Inc., San Jose, CA (US);

Inventor:

John Foster, Mountain View, CA (US);

Assignee:

Intermolecular, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 21/302 (2006.01); H01L 21/461 (2006.01); C23F 1/00 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 21/3213 (2006.01); H01L 21/67 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30604 (2013.01); H01L 21/02071 (2013.01); H01L 21/32134 (2013.01); H01L 21/67086 (2013.01); H01L 21/823828 (2013.01); H01L 22/12 (2013.01); H01L 22/20 (2013.01); H01L 22/30 (2013.01);
Abstract

Combinatorial workflow is provided for evaluating cleaning processes after forming a gate structure of transistor devices, to provide optimized process conditions for gate stack formation, including metal gate stack using high-k dielectrics. NMOS and PMOS transistor devices are combinatorially fabricated on multiple regions of a substrate, with each region exposed to a different cleaning chemical and process. The transistor devices are then characterized, and the data are compared to categorize the potential damages of different cleaning chemicals and processes. Optimized chemicals and processes can be obtained to satisfy desired device requirements.


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