The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2015
Filed:
Jun. 01, 2014
Avery Design Systems, Inc., Andover, MA (US);
Kai-Hui Chang, North Andover, MA (US);
Yen-Ting Liu, Kaohsiung, TW;
Christopher S. Browy, Boston, MA (US);
Chi-Lai Huang, Andover, MA (US);
Avery Design Systems, Inc., Tewksbury, MA (US);
Abstract
A retention synthesis application provides a means of analyzing a circuit design, functional test sequences, and the associated power specification to identify registers that do not need retention when a block is powered down. Reducing the number of retention registers reduces power consumption and chip area. The retention synthesis application is based, at least in part, upon symbolic simulation. In symbolic simulation, a symbol is used to represent a value that can be either 0 or 1 and the propagation of symbols is traced through the simulation.