The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2015
Filed:
Sep. 29, 2012
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
James W. Alexander, Hillsboro, OR (US);
Buck W. Gremel, Olympia, WA (US);
Pinkesh J. Shah, Gilbert, AZ (US);
Malay Trivedi, Chandler, AZ (US);
Mohan K. Nair, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
An apparatus and method are disclosed to optimize the latency and the power of a link operating inside a processor-based system. The apparatus and method include a latency meter built into a queue that does not rely on a queue-depth threshold. The apparatus and method also include feedback logic that optimizes power reduction around an increasing latency target to react to sluggish re-provisioning behavior imposed by the physical properties of the link.