The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2015

Filed:

Dec. 20, 2013
Applicant:

National Chung Cheng University, Chia-Yi, TW;

Inventor:

Jinn-Shyan Wang, Chia-yi, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/00 (2006.01); G06F 1/00 (2006.01); H03K 3/037 (2006.01); H03K 5/05 (2006.01); H03K 5/1534 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0013 (2013.01); G06F 1/00 (2013.01); H03K 3/0375 (2013.01); H03K 5/05 (2013.01); H03K 5/1534 (2013.01);
Abstract

A dynamic voltage scaling system having time borrowing and local boosting capability, including: a time borrowing circuit and a local boost circuit. The time borrowing circuit connected electrically between a primary stage logic circuit and a secondary stage logic circuit is activated by an all-domain clock signal, and then generates an output data to the secondary stage logic circuit based on input data to the primary stage logic circuit. The local boost circuit is connected to a low working voltage line, when input data of the time borrowing circuit lags behind a positive level of said all-domain clock signal, the time borrowing circuit delays fetching data by a flip flop and changes state to produce a warning signal, so that the local boost circuit disconnects its connection with said low working voltage line, and is connected electrically to a high working voltage line.


Find Patent Forward Citations

Loading…