The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2015
Filed:
Jan. 08, 2014
United Microelectronics Corp., Hsinchu, TW;
Hsin-Ming Hou, Tainan, TW;
Ji-Fu Kung, Taichung, TW;
United Microelectronics Corp., Hsinchu, TW;
Abstract
A layout correcting method and a layout correcting system are provided. The layout correcting method includes the following steps. An integrated circuit design layout is provided. A plurality of performance parameters of the integrated circuit design layout are analyzed. A plurality of devices under test is selected according to the performance parameters. A computer simulating process is performed on the devices under test and a direct probing process is performed on the devices under test. The direct probing process is an on-chip test for comparing each device under test and an environment condition thereof by a Boolean algebra algorithm. A plurality of differences between the results of the computer simulating process and the direct probing process is analyzed. The integrated circuit design layout is corrected according to differences between the results of the computer simulating process and the direct probing process.