The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2015

Filed:

Dec. 27, 2011
Applicants:

Philippe Lebourg, Saint Paul de Varces, FR;

Paul Armagnat, Seyssinet, FR;

Thomas Droniou, Grenoble, FR;

Inventors:

Philippe Lebourg, Saint Paul de Varces, FR;

Paul Armagnat, Seyssinet, FR;

Thomas Droniou, Grenoble, FR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2014.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318572 (2013.01);
Abstract

A method for scan-testing of an integrated circuit includes the following steps carried out by the circuit itself: upon powering on of the circuit, watching for bit sequences applied to a use pin configured for receiving serial data from the exterior at the rate of a clock signal applied to a clock pin; configuring the circuit in a test mode when a bit sequence is identified as a test initialization sequence; connecting latches of the circuit in a shift register configuration, and connecting the shift register for receiving a test vector in series from the use pin; switching the transfer direction of the use pin to the output mode for providing to the exterior serial data at the rate of the clock signal; and connecting the shift register for providing its content, as a test result set, in series on the use pin.


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