The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2015

Filed:

Jul. 23, 2012
Applicants:

Yung-fa Lin, Hsinchu, TW;

Shou-yi Hsu, Hsinchu County, TW;

Meng-wei Wu, Hsinchu, TW;

Chia-hao Chang, Hsinchu, TW;

Inventors:

Yung-Fa Lin, Hsinchu, TW;

Shou-Yi Hsu, Hsinchu County, TW;

Meng-Wei Wu, Hsinchu, TW;

Chia-Hao Chang, Hsinchu, TW;

Assignee:

Anpec Electronics Corporation, Hsinchu Science Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0634 (2013.01); H01L 29/6653 (2013.01);
Abstract

The present invention provides a manufacturing method of a trench type power transistor device with a super junction. First, a substrate of a first conductivity type is provided, and then an epitaxial layer of a second conductive type is formed on the substrate. Next, a through hole is formed in the epitaxial layer, and the through hole penetrates through the epitaxial layer. Two doped drain regions of the first conductivity type are then formed in the epitaxial layer respectively at two sides of the through hole, and the doped drain regions extend from a top surface of the epitaxial layer to be in contact with the substrate.


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