The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8921229 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 30, 2014

Filed:

Aug. 22, 2012
Applicants:

Yuling Liu, Tianjin, CN;

Xiaoyan Liu, Tianjin, CN;

Jun Tian, Tianjin, CN;

Inventors:

Yuling Liu, Tianjin, CN;

Xiaoyan Liu, Tianjin, CN;

Jun Tian, Tianjin, CN;

Assignee:

Other;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/461 (2006.01); C09K 3/14 (2006.01); C09G 1/02 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3212 (2013.01); C09K 3/1463 (2013.01); C09G 1/02 (2013.01);
Abstract

A method of polishing copper wiring surfaces of in ultra large scale integrated circuit, the method including: a) preparing a polishing solution including between 35 and 80 w. % of a nano SiOabrasive, between 12 and 60 w. % of deionized water, between 1 and 3 w. % of an oxidant, between 1 and 4 w. % of an active agent, and between 0.5 and 1.5 w. % of a chelating agent; and b) polishing using the polishing solution under following conditions: between 2 and 5 kPa pressure; between 20 and 50° C.; between 120 and 250 mL/min slurry flow rate; and at between 30 and 60 rpm/min rotational speed.


Find Patent Forward Citations

Liu, Yuling. (2014). Method of polishing copper wiring surfaces in ultra large scale integrated circuits (U.S. Patent No. 8921229). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8921229

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