The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2014
Filed:
Dec. 20, 2011
Wuu-cherng Lin, San Jose, CA (US);
Fangyun Richter, San Jose, CA (US);
Che Ta Hsu, San Jose, CA (US);
Wen Sun Wu, Bayan Lepas, MY;
Wuu-Cherng Lin, San Jose, CA (US);
Fangyun Richter, San Jose, CA (US);
Che Ta Hsu, San Jose, CA (US);
Wen Sun Wu, Bayan Lepas, MY;
Altera Corporation, San Jose, CA (US);
Abstract
Integrated circuits containing transistors are provided. A transistor may include a gate structure formed over an associated well region. The well region may be actively biased and may serve as a body terminal. The well region of one transistor may be formed adjacent to a gate structure of a neighboring transistor. If the gate structure of the neighboring transistor and the well region of the one transistor are both actively biased and are placed close to one another, substantial leakage may be generated. Computer-aided design tools may be used to identify actively driven gate terminals and well regions and may be used to determine whether each gate-well pair is spaced sufficiently far from one another. If a gate-well pair is too close, the design tools may locate an existing gate cut layer and extend the existing gate cut layer to cut the actively driven gate structure.