The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2014
Filed:
Nov. 05, 2012
Jong-heun Lim, Hwaseong-si, KR;
Ki-ho Bae, Seoul, KR;
Hyo-jung Kim, Seoul, KR;
Kyung-hyun Kim, Seoul, KR;
Chan-wook Seo, Hwaseong-si, KR;
Young-beom Pyon, Suwon-si, KR;
Jong-heun Lim, Hwaseong-si, KR;
Ki-ho Bae, Seoul, KR;
Hyo-jung Kim, Seoul, KR;
Kyung-hyun Kim, Seoul, KR;
Chan-wook Seo, Hwaseong-si, KR;
Young-beom Pyon, Suwon-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-Do, KR;
Abstract
According to example embodiments of inventive concepts, a non-volatile memory device includes a substrate including a second impurity region crossing a first impurity region, and channel regions extending in a vertical direction on the substrate. Gate electrodes may be separated from each other in a vertical direction and a horizontal direction along outer walls of the channel regions. A first insulating interlayer may be on the gate electrodes and the channel regions, where the first insulating interlayer defines a contact hole between at least one adjacent pair gate electrodes and a contact plug is formed in the contact hole to be electrically connected to the second impurity region. An etch stop layer pattern may be on the contact plug and the first insulating interlayer.