The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Mar. 14, 2011
Applicants:

Deepa Ratakonda, San Jose, CA (US);

Christopher J. Pass, San Jose, CA (US);

Che Ta Hsu, San Jose, CA (US);

Fangyun Richter, San Jose, CA (US);

Wilson Wong, San Francisco, CA (US);

Inventors:

Deepa Ratakonda, San Jose, CA (US);

Christopher J. Pass, San Jose, CA (US);

Che Ta Hsu, San Jose, CA (US);

Fangyun Richter, San Jose, CA (US);

Wilson Wong, San Francisco, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/26 (2006.01); H01L 21/324 (2006.01); H01L 21/42 (2006.01); H01L 21/477 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit may include a substrate in which transistors are formed. The transistors may be associated with blocks of circuitry. Some of the blocks of circuitry may be configured to reduce leakage current. A selected subset of the blocks of circuitry may be selectively heated to reduce the channel length of their transistors through dopant diffusion and thereby strengthen those blocks of circuitry relative to the other blocks of circuitry. Selective heating may be implemented by coating the blocks of circuitry on the integrated circuit with a patterned layer of material such as a patterned anti-reflection coating formed of amorphous carbon or a reflective coating. During application of infrared light, the coated and uncoated areas will rise to different temperatures, selectively strengthening desired blocks of circuitry on the integrated circuit.


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