The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Mar. 16, 2011
Said Hamdioui, Zoetermeer, NL;
Zaid Al-ars, Delft, NL;
Georgi Nedeltchev Gaydadjiev, Delft, NL;
Adrianus Van DE Goor, Gouda, NL;
Said Hamdioui, Zoetermeer, NL;
Zaid Al-Ars, Delft, NL;
Georgi Nedeltchev Gaydadjiev, Delft, NL;
Adrianus van de Goor, Gouda, NL;
Technische Universiteit Delft, Delft, NL;
Abstract
Method for testing a memory under test () including a plurality of memory cells and a Memory Built-In Self-Test Engine () connectable to a memory under test. The MBIST engine () is arranged to generate appropriate addressing and read and/or write operations to the memory under test (). The MBIST engine () is connected to a March Element Stress register (MESR) (), a generic march element register (GMER) (), and a Command Memory (). The GMER () specifies one of a set of Generic March Elements (GME), and the MESR () specifies the stress conditions to be applied. Only a few GMEs are required in order to specify most industrial algorithms. The architecture is orthogonal and modular, and all speed related information is contained in the GME. In addition, only little memory is required for the specification of the test, providing a low implementation cost, yet with a high flexibility.