The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Dec. 04, 2009
Applicant:
Nitin Bansal, Haryana, IN;
Inventor:
Nitin Bansal, Haryana, IN;
Assignee:
STMicroelectronics International N.V., Amsterdam, NL;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 1/00 (2006.01); G06F 1/26 (2006.01); H02M 1/36 (2007.01);
U.S. Cl.
CPC ...
H02J 1/00 (2013.01); G06F 1/26 (2013.01); H02M 1/36 (2013.01);
Abstract
The present disclosure teaches a power management device for providing one or more voltages and prohibiting the operation until the IC is initialized and voltage stability is achieved. The power management device includes a power regulator block and a masking block. The power regulator block includes one or more of the following elements:- a regulator, a bandgap reference generator, a low voltage detector LVDD, a low voltage detector LVDM, and a plurality of logic gates. In one embodiment, the masking block includes one or more level shifters, a plurality of logic gates, a D flip-flop, and a power on reset circuit (PoR).