The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Dec. 23, 2010
Applicants:

Eric Beyne, Kapeldreef, BE;

Paresh Limaye, Kapeldreef, BE;

Inventors:

Eric Beyne, Kapeldreef, BE;

Paresh Limaye, Kapeldreef, BE;

Assignee:

IMEC, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/053 (2006.01); H01L 21/00 (2006.01); H01L 23/538 (2006.01); H01L 23/36 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/73204 (2013.01); H01L 25/0657 (2013.01); H01L 2924/01075 (2013.01); H01L 2224/97 (2013.01); H01L 2924/09701 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/14 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/01016 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/07811 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01032 (2013.01); H01L 2924/01013 (2013.01); H01L 23/36 (2013.01); H01L 2924/01005 (2013.01); H01L 23/3128 (2013.01); H01L 2924/01023 (2013.01); H01L 2924/01033 (2013.01); H01L 23/562 (2013.01); H01L 24/97 (2013.01);
Abstract

A semiconductor device is described advantageously making use of the interposer principle. The semiconductor device comprises at least one semiconductor die, a window substrate being an inorganic substrate comprising at least one window-shaped cavity for mounting the at least one semiconductor die, the window substrate having interconnect structures. Furthermore, the at least one semiconductor die is positioned inside the at least one cavity and is connected to the interconnect structures, providing connections to another level of assembly or packaging of the semiconductor device. The invention also relates to a method of manufacturing such a semiconductor device.


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