The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Jun. 20, 2011
Randolph R. Kay, Albuquerque, NM (US);
David V. Campbell, Tijeras, NM (US);
Subhash L. Shinde, Albuquerque, NM (US);
Jeffrey L. Rienstra, Albuquerque, NM (US);
Darwin K. Serkland, Albuquerque, NM (US);
Michael L. Holmes, Albuquerque, NM (US);
Seethambal S. Mani, Albuquerque, NM (US);
Joy M. Barker, Albuquerque, NM (US);
Dahwey Chu, Albuquerque, NM (US);
Thomas Gurrieri, Albuquerque, NM (US);
Randolph R. Kay, Albuquerque, NM (US);
David V. Campbell, Tijeras, NM (US);
Subhash L. Shinde, Albuquerque, NM (US);
Jeffrey L. Rienstra, Albuquerque, NM (US);
Darwin K. Serkland, Albuquerque, NM (US);
Michael L. Holmes, Albuquerque, NM (US);
Seethambal S. Mani, Albuquerque, NM (US);
Joy M. Barker, Albuquerque, NM (US);
Dahwey Chu, Albuquerque, NM (US);
Thomas Gurrieri, Albuquerque, NM (US);
Sandia Corporation, Albuquerque, NM (US);
Abstract
A modular, scalable focal plane array is provided as an array of integrated circuit dice, wherein each die includes a given amount of modular pixel array circuitry. The array of dice effectively multiplies the amount of modular pixel array circuitry to produce a larger pixel array without increasing die size. Desired pixel pitch across the enlarged pixel array is preserved by forming die stacks with each pixel array circuitry die stacked on a separate die that contains the corresponding signal processing circuitry. Techniques for die stack interconnections and die stack placement are implemented to ensure that the desired pixel pitch is preserved across the enlarged pixel array.