The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Dec. 17, 2012
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Heung-Jae Cho, Gyeonggi-do, KR;

Eui-Seong Hwang, Gyeonggi-do, KR;

Tae-Yoon Kim, Gyeonggi-do, KR;

Kyu-Hyung Yoon, Gyeonggi-do, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01); H01L 29/02 (2006.01); H01L 49/02 (2006.01); H01L 21/18 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 29/02 (2013.01); H01L 27/10855 (2013.01); H01L 27/10885 (2013.01); H01L 28/40 (2013.01); H01L 27/10814 (2013.01); H01L 21/185 (2013.01); H01L 27/10891 (2013.01);
Abstract

A method for fabricating a semiconductor device includes forming a first semiconductor wafer, in which a circuit part and a first bonding layer are stacked, on a first semiconductor substrate, forming a second semiconductor wafer, which includes structures and an insulating layer for gap-filling between the structures, on a second semiconductor substrate, the structures including a pillar and bit lines stacked therein, bonding the first semiconductor wafer with the second semiconductor wafer so that the first bonding layer faces the insulating layer, and separating the second semiconductor substrate from the bonded second semiconductor wafer.


Find Patent Forward Citations

Loading…