The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2014
Filed:
Dec. 05, 2012
Cadence Design Systems, Inc., San Jose, CA (US);
Adrian Luigi Leuciuc, Frederick, MD (US);
William Pierce Evans, Catonsville, MD (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
An analog to digital converting system () includes an analog to digital converter (ADC) circuit that is formed by a plurality of parallel ADCs (ADCADC N) for continuous sequential processing of an input analog voltage signal. Each of the ADCs is a type that employs a capacitor digital to analog converter (DAC) () therein. The system further includes a sample and hold circuit () coupled to the parallel ADCs by a conductive interconnect wiring pattern (). The sample and hold circuit includes a sampling switch () and a hold capacitance formed by the parallel combination of a hold capacitor () and the distributed parasitic capacitance () of the conductive interconnect wiring pattern (). During the hold phase of the sample and hold circuit, charge is redistributed from the hold capacitance to all of the capacitors () of the capacitor DAC, which serve as a secondary hold capacitance.