The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2014

Filed:

Feb. 21, 2013
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventors:

Nobutoshi Aoki, Yokohama, JP;

Masaki Kondo, Kawasaki, JP;

Takashi Izumida, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/792 (2006.01); H01L 21/28 (2006.01); H01L 29/788 (2006.01); H01L 27/115 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/792 (2013.01); H01L 21/28282 (2013.01); H01L 21/28273 (2013.01); H01L 29/7883 (2013.01); H01L 27/11524 (2013.01); H01L 27/1157 (2013.01); G11C 16/0441 (2013.01);
Abstract

According to one embodiment, a semiconductor storage device includes a first insulating film formed on a substrate and functioning as a FN (Fowler-Nordheim) tunnel film, a first floating gate formed on the first insulating film, an inter-floating-gate insulating layer formed on the first floating gate and functioning as a FN tunnel film, a second floating gate formed on the inter-floating-gate insulating layer, a second insulating film formed on the second floating gate, and a control gate formed on the second insulating film. The inter-floating-gate insulating layer includes a third insulating film and a fourth insulating film having a charge trap property which are stacked.


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