Method for forming a dual damascene structure of a semiconductor device, and a semiconductor device therewith

Abstract

Forming a dual damascene structure includes forming a first insulation layer and a second insulation layer, forming a resist mask, forming a via hole down to a lower end of the first insulation layer, forming a hardmask layer in the via hole and on the second insulation layer using a spin-coating method, forming a resist mask, forming a first trench hole down to a lower end of the second insulation layer, respectively removing a part of the hardmask layer in the via hole and a part of the hardmask layer on the second insulation layer, forming a second trench hole by removing a part of the first insulation layer between a top corner of the hardmask layer remaining in the via hole and a bottom corner of the first trench hole, removing the hardmask layer, and filling the via hole and the second trench hole with a conductive material.