The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8895407 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 25, 2014

Filed:

Sep. 27, 2010
Applicants:

Hidekazu Miyairi, Isehara, JP;

Akihisa Shimomura, Isehara, JP;

Tatsuya Mizoi, Atsugi, JP;

Eiji Higa, Atsugi, JP;

Yoji Nagano, Atsugi, JP;

Inventors:

Hidekazu Miyairi, Isehara, JP;

Akihisa Shimomura, Isehara, JP;

Tatsuya Mizoi, Atsugi, JP;

Eiji Higa, Atsugi, JP;

Yoji Nagano, Atsugi, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/46 (2006.01); H01L 21/762 (2006.01); H01L 27/12 (2006.01); H01L 51/00 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76254 (2013.01); H01L 27/1214 (2013.01); H01L 27/1266 (2013.01); H01L 51/0027 (2013.01); H01L 29/78654 (2013.01); H01L 2224/03552 (2013.01);
Abstract

A manufacturing method of an SOI substrate which possesses a base substrate having low heat resistance and a very thin semiconductor layer having high planarity is demonstrated. The method includes: implanting hydrogen ions into a semiconductor substrate to form an ion implantation layer; bonding the semiconductor substrate and a base substrate such as a glass substrate, placing a bonding layer therebetween; heating the substrates bonded to each other to separate the semiconductor substrate from the base substrate, leaving a thin semiconductor layer over the base substrate; irradiating the surface of the thin semiconductor layer with laser light to improve the planarity and recover the crystallinity of the thin semiconductor layer; and thinning the thin semiconductor layer. This method allows the formation of an SOI substrate which has a single-crystalline semiconductor layer with a thickness of 100 nm or less over a base substrate.


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