The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2014
Filed:
Oct. 06, 2012
Synopsys Taiwan Co., Ltd., Taipei, TW;
Synopsys, Inc., Mountain View, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Synopsys Taiwan Co., Ltd., Taipei, TW;
Abstract
A computer-implemented method is disclosed for layout pattern or layout constraint reuse by identifying sub-circuits with identical or similar schematic structure based on a topology comparison strategy. The selected sub-circuit is transformed into a topology representing the relative positions among the instances of the selected sub-circuit. Based on the topology, one or more sub-circuits with identical or similar topologies in a predefined scope of a schematic are recognized and identified. Accordingly, the layout or the layout constraint of the selected sub-circuit is copied and associated to each of the identified sub-circuits. Furthermore, once the sub-circuits are identified, they can be listed on a user interface with notations to allow users to confirm each of the identified sub-circuits respectively.