The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2014
Filed:
Nov. 30, 2012
Applicant:
Samsung Electronics Co., Ltd., Suwon-Si, KR;
Inventors:
Assignee:
Samsung Electronics Co., Ltd., Gyeonggi-Do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 23/34 (2006.01); H01L 29/40 (2006.01); H01L 25/18 (2006.01); H01L 23/49 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49 (2013.01); H01L 25/18 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/484 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/014 (2013.01); H01L 2225/0651 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48235 (2013.01); H01L 2224/48145 (2013.01); H01L 25/0657 (2013.01); H01L 24/00 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/15311 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/83191 (2013.01); H01L 23/3128 (2013.01); H01L 2924/01083 (2013.01); H01L 24/49 (2013.01); H01L 2924/01033 (2013.01); H01L 2224/4917 (2013.01); H01L 25/0652 (2013.01); H01L 2224/4911 (2013.01); H01L 2225/06506 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 24/48 (2013.01); H01L 2225/06562 (2013.01);
Abstract
Provided are semiconductor packages and electronic systems including the same. A first memory chip may be stacked on a first portion of a substrate. A controller chip may be stacked on a second portion of the substrate, which is different from the first portion. At least one first bonding wire may directly connect the first memory chip with the controller chip. At least one second bonding wire may directly connect the first memory chip with the substrate, and may be electrically connected with the at least one first bonding wire.