The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2014
Filed:
Oct. 03, 2011
Tadahiro Ohmi, Miyagi, JP;
Xun Gu, Miyagi, JP;
Tadahiro Ohmi, Miyagi, JP;
Xun Gu, Miyagi, JP;
National University Corporation Tohoku University, Sendai-shi, Miyagi, JP;
Abstract
Provided is a method of manufacturing a semiconductor device of a multilayer wiring structure that comprises a CFfilm as an interlayer insulating film, that can make the most of the advantage of the CFfilm having a low dielectric constant, and that can prevent degradation of the properties of the CFfilm due to CMP. The method of this invention includes (a) forming a CFfilm, (b) forming a recess of a predetermined pattern on the CFfilm, (c) providing a wiring layer so as to bury the recess and to cover the CFfilm, and (d) removing the excess wiring layer on the CFfilm other than in the recess by CMP (Chemical Mechanical Polishing), thereby exposing a surface of the CFfilm, wherein (e) nitriding the surface of the CFfilm is provided before or after (b).