Smart read scheme for memory array sensing

Abstract

Methods for reducing variability in bias voltages applied to a plurality of memory cells during a sensing operation caused by IR drops along a word line shared by the plurality of memory cells are described. In some embodiments, IR drops along a shared word line may be reduced by reducing sensing currents associated with memory cells whose state has already been determined during a sensing operation. In one example, once a sense amplifier detects that a memory cell being sensed is in a particular state, then the sense amplifier may disable sensing of the memory cell and discharge a corresponding bit line associated with the memory cell. In some cases, a bit line voltage associated with a memory cell whose state has not already been determined during a first phase of a sensing operation may be increased during a second phase of the sensing operation.