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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8884361 B1

PDFFull Text
Date of Patent:
Nov. 11, 2014

Filed:

Jan. 13, 2012

Semiconductor device

Applicants:

Nobuyuki Shirai, Takasaki, JP;

Nobuyoshi Matsuura, Takasaki, JP;

Inventors:

Nobuyuki Shirai, Takasaki, JP;

Nobuyoshi Matsuura, Takasaki, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, JP;

Attorney:

Miles & Stockbridge P.C.

Primary Examiner:

Long Pham

Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7811 (2013.01); H01L 29/456 (2013.01); H01L 2224/16 (2013.01); H01L 29/41766 (2013.10); H01L 2924/01079 (2013.01); H01L 29/66727 (2013.01); H01L 2924/3011 (2013.01); H01L 29/66734 (2013.01); H01L 2924/30107 (2013.01); H01L 29/0615 (2013.01); H01L 29/4941 (2013.01); H01L 29/7813 (2013.01); H01L 2924/0102 (2013.01); H01L 2924/30105 (2013.01); H01L 29/4238 (2013.01);
Abstract

A semiconductor device which includes a gate electrode electrically connected to a gate portion made of a polysilicon film provided inside of a plurality of grooves formed in a striped form along a direction of a chip region. The gate electrode is formed as a film at the same layer level as a source electrode electrically connected to a source region formed between adjacent stripe-shaped grooves. The gate electrode is constituted of a gate electrode portion formed along a periphery of the chip region and a gate finger portion arranged to divide the chip region into halves. The source electrode is constituted of an upper portion and a lower portion relative to the gate finger portion, and the gate electrode and the source electrode are connected to a lead frame via a bump electrode.

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