The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Jan. 11, 2013
Applicant:

Renesas Electronics Corporation, Kawasaki, JP;

Inventors:

Hiroyuki Nakajima, Kawasaki, JP;

Shigeyuki Ueno, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2006.01); H04L 1/00 (2006.01); H03M 13/29 (2006.01); H03M 13/00 (2006.01); G06F 12/02 (2006.01); H03M 13/41 (2006.01); G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
G06F 12/10 (2013.01); H04L 1/0071 (2013.01); H03M 13/2936 (2013.01); H03M 13/618 (2013.01); G06F 12/02 (2013.01); H03M 13/41 (2013.01); H04L 1/0052 (2013.01); G06F 9/34 (2013.01); H03M 13/6362 (2013.01);
Abstract

A semiconductor device according to the present invention includes a first address generation unit that includes a first register group and generates a table address by a cyclically repeating first pattern using a value stored to the first register group, a second address generation unit that includes a second register group and generates an access address by a cyclically repeating second pattern using a value stored to the second register group and parameter information determined by the table address, and a control unit that outputs setting information to be supplied to the first register group and the second register group. Further, the semiconductor device performs at least one of a read process and a write process of data from and to a data memory using the access address.


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