The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2014
Filed:
Jun. 17, 2013
Applicant:
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Inventors:
Hiroaki Hazama, Tokyo, JP;
Norio Ohtani, Yokkaichi, JP;
Assignee:
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/06 (2006.01); G11C 16/10 (2006.01); H01L 27/115 (2006.01); G11C 16/34 (2006.01); G11C 16/14 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); H01L 27/11524 (2013.01); H01L 27/11521 (2013.01); H01L 27/115 (2013.01); G11C 16/14 (2013.01); G11C 16/3459 (2013.01);
Abstract
A nonvolatile semiconductor memory device having a plurality of electrically rewritable nonvolatile memory cells connected in series together includes a select gate transistor connected in series to the serial combination of memory cells. A certain one of the memory cells which is located adjacent to the select gets transistor is for use as a dummy cell. This dummy cell is not used for data storage. During data erasing, the dummy cell is applied with the same bias voltage as that for the other memory cells.