The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Apr. 08, 2013
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Kuo-Yu Chou, Hsinchu, TW;

Wei Lun Tao, Hsinchu, TW;

Shang-Fu Yeh, Hsinchu, TW;

Yi-Che Chen, Taichung, TW;

Calvin Yi-Ping Chao, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/72 (2006.01);
U.S. Cl.
CPC ...
H03M 1/72 (2013.01);
Abstract

The present disclosure relates to a method and architecture to minimize a transient glitch within a current digital-to-analog converter (DAC) comprising an array of identical current unit cells. The current DAC is configured with individual column decoders for even and odd rows of current unit cells, thus allowing for independent control of adjacent rows. The even row and odd row column decoders further comprise thermal decoders with coupled timing encoding which establishes synergy between an adjacent pair of rows. As current units cells within an active row are activated across the row by a counting up of a first column decoder, the current units cells within a next row adjacent the active row are returned to an initial state of the active row by counting down in a second column decoder. Other devices and methods are also disclosed.


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